The present disclosure generally relates to static random access memory (SRAM).
SRAM is a type of semiconductor memory typically used in computing applications requiring high-speed data access. For example, cache memory applications use SRAMs to store frequently-accessed data—e.g., data accessed by central processing units.
The SRAM's cell structure and architecture enable the high-speed data access. The SRAM cell includes a bi-stable flip-flop structure and transistors that pass voltages from bitlines to the flip-flop structure. A typical SRAM architecture includes one or more arrays of memory cells and support circuitry. The memory cells of each SRAM array are arranged in rows and columns. Access to memory cells in a row is controlled by a “wordline.” Data is transferred into (write operation) and out of (read operation) memory cells on “bitlines.” There is at least one bitline for each column of memory cells. The support circuitry includes address and driver circuits to access each of the SRAM cells—via the wordlines and bitlines—for various SRAM operations.